The present invention relates to a vector processing system. More particularly, it relates to a vector processing system in which the speed of the store access operation is improved.
The vector processing systems described below are widely known. The vector processing system is connected to a memory storage unit(s) for storing data to be vector-calculated. The data in a main storage unit are loaded, aligned for vector calculation in a certain order, stored in a vector register unit, and vector-calculated. The vector-calculated data are re-aligned, for storing in the main storage unit and then stored in the main storage unit. The vector calculation may be an addition, multiplication, division or any combination thereof. To speed up the above operation, the vector processing system is given a pipe line construction. In addition, when the vector processing system is connected to a plurality of main storage units, a priority decision circuit for determining the priority for access to the main storage units is provided.
The prior vector processing systems suffer from the disadvantages of a low operation speed and a complex circuit construction.